“Accelerated” bioinformatics boxes built with reconfigurable chips like ASICs and FPGAs occupy a well-worn niche within the sector. After all, Compugen was initially founded over a decade ago around its Bioccelerator product line of souped-up boxes, and Time Logic and Paracel both got their start around the same time with similar systems. Now, Starbridge Systems thinks the accelerator market is ready for a bit of new blood.
Founded in 1998, Starbridge has established comfortable user bases for its FPGA-based “Hypercomputer” in defense, geosciences, aerospace, and national security, and set its sights on the bioinformatics market about a year and a half ago when it began working with the National Cancer Institute on an implementation of the Smith-Waterman alignment algorithm.
In March, the company released the first performance numbers for Smith-Waterman on its system: A comparison of the human X and Y chromosomes took five days, and the alignment of two bacterial genomes — Coxiella Burnetii, at 1,995,275 bases, and Synechocystis PCC6830, at 3,573,470 bases — took around 10 minutes, the company said. At press time, Starbridge did not have complete benchmarks for its system relative to other platforms, but company officials said this information would be available within several months.
The use of reconfigurable hardware systems to deliver number-crunching power for Smith-Waterman and other computationally intensive bioinformatics algorithms is nothing new. Some academic research groups are even creating their own FPGA-based accelerators now. What is new about the Starbridge system, according to the company, is a graphical development environment called Viva that makes it much easier to program the reconfigurable chips, which enables a denser configuration of FPGAs — and, subsequently, more computing power.
Rebecca Krull, vice president of marketing at Starbridge, said that typical FPGA design environments permit a maximum of 2-3 million gates. “After that it gets a little bit more difficult to work with those tools,” she said. By comparison, the Starbridge Hypercomputer that ran the five-day X-Y Smith-Waterman comparison used a 98 million-gate design. The company’s systems start at a 36 million-gate configuration (see box, below), and go as high as 124 million gates.
The company is already offering a version of its Hypercomputer with Smith-Waterman installed, but Starbridge sees a much broader opportunity for its reconfigurable system in the bioinformatics market due to the Viva development package. This environment suits the sector’s do-it-yourself philosophy especially well, Krull noted. Unlike other vertical markets, like geosciences, where “there is a small set of algorithms that are widely used, and everyone uses them,” Krull said that bioinformatics “is so research-intensive and things are changing and algorithms are changing and being tweaked all the time.”
The company chose Smith-Waterman as a proof of concept for its technology, she said, because it was a computational challenge that the market could easily recognize, but acknowledged that most prospective customers are looking to “leapfrog” the traditional alignment and gene-prediction algorithms in favor of protein folding, text mining, systems biology, and other applications.
Fred Geiger, director of product management for Starbridge, said the company plans to partner with customers to translate their favorite algorithms to the Hypercomputing platform, but also expects to see some customers using Viva to program the system themselves.
Pricing for the system starts at $175,000 — a bit high in comparison to entry-level systems from Time Logic and Paracel, but a hands-down winner when it comes to price/performance, according to the company. Krull said that Starbridge doesn’t even consider Time Logic or Paracel as its primary competitors: “We really think of ourselves as competing more with clusters,” she said.
Ed McGarr, vice president of sales and customer services at Starbridge, was quick to add that “we’re not saying we want to replace clusters. We actually want to accelerate them.” The company envisions its system as part of a larger high-performance computing environment “where applications can be running on a cluster, and the computational heavy lifting can be passed to the Hypercomputer,” he said. “It’s actually best to take an application, port the computationally intense kernels to our platform, and then run a dual environment,” he added.
Krull said that Starbridge is currently in discussions with a number of potential customers, including one company looking into a Hypercomputer back end for an ASP-style genomics data portal. The market has been receptive to the company’s approach, she said, but cautious: “We’ve been seeing a lot of the attitude where, ‘There’s really nothing new, and we’re satisfied with what we have and we can’t really afford much else,’” she said. “But we feel that this is different enough that it merits attention.”
Starbridge Systems’ HC-36 Board Specifications
- 7 Virtex-II FPGAs/board (~36 million gates)
- 10 GB DDR SRAM memory
- 20 Gbps memory bandwidth
- 20 64-bit parallel memory channels per board
- 1.9 MB cache memory
- 225 Gbps inter-chip communications bandwidth on board
- 1091 inter-chip communications lines
- 280 external IO lines
- 64-bit, 66 MHz PCI-X bus interface
- Power consumption: 100 watts (average), 200 watts (peak)
- Dimensions: 13 1/8” x 5 1/8” x 2 1/2”
- Weight: 5-5.25 lbs.