Intel's Path to Exascale Computing Very, Very Hot

By Matthew Dublin

In order to make exascale computing a reality, engineers at Intel are aiming to push Moore's Law as far as it can go — 100 times faster than current processors operate by the 2018 to be exact. One approach to exascale-capable processor design is to stack chips and transistors on top of each other so that processors will be built more like cubes rather traditional flat chips.The reason for a cube shaped chip architecture is to facilitate faster data transfer in and out of the processor cores.

As Steve Pawlowski, an exascale computing researcher an Intel senior fellow, explained tothe Register at the recent European Research and Innovation Conference in Ireland, by stacking on top of the CPU die designers can make wider memory interfaces or increased bandwidth, thereby reducing the length a signal has to go from A to B.

The only problem with stacking is the one its implemented to surmount — Moore's Law. In lab experiments so far, the heat created by stacking chips has the undesirable effect of melting the chips. Despite this unfortunate side-effect, Pawlowski is convinced that this design is the way to go as the answer will not be found in constructing HPC chips with new materials, such as graphene which IBM has already shown can be used to create very fast chips.

"Every time I hear this technology is going to run out of gas in ten years and we’re going to need something new, there’s always some new way of engineering or some new creative way to use the material that gives you a longer life," says Pawlowski.


Can fractal-shaped 3D

Can fractal-shaped 3D chips---Menger sponge or the like---maximize heat dissipation:transistor? The lung is designed something like this (I'm a mathematical/systems biologist).

You correctly note the

You correctly note the immense heat problem presented by massively parallel computing. INTEL's Hybrid Memory Cube not only does not solve the heat problem for the CPUs, but presents very large costs.

We've taken a different approach: https://www.venraytechnology.com/economics_of_cpu_in_DRAM2.pdf

Russell Fish
russell.fish@venraytechnology.com