Innovative Chip Design for HPC

By Matthew Dublin

Samsung and Micron have announced a partnership to developed a new type of memory chip, designed specifically for HPC. Called the Hybrid Cube Consortium, the new partnership is ambitiously claiming to build a chip with 15 times the memory bandwidth of current HPC chips. If they develop an approach that really works seamlessly in a multi-terabyte environment, there could be a slew of application areas for bioinformatics.

While the Hybrid Cube Consortium plans of releasing their new chip architecture sometime in 2012, HP has announced that intends to release its "memristor" memory—a two-terminal non-volatile memory technology—in the next 18 months. HP's memristor is being pitched as a replacement for flash memory, specifically DRAM (direct random access memory) in three to four years, and then SRAM (static-random access memory).

The Hybrid Memory Cube approach is to place the logic layer of the chip on the bottom and the memory densely stacked on top in a cube as opposed to a flatter type of architecture common in current chips.