By Matthew Dublin
Moving on from the failed 10 petaflop Power 7-based Blue Waters supercomputer project for the National Center for Supercomputing Applications, IBM has now teamed up with two Department of Energy labs reaching for the multi-petaflop stars. IBM's Blue Gene/Q Soc technology will be used to develop the 10 petaflop "Mira" system at Argonne National Lab and the 20 petaflop "Sequoia" at Lawrence Livermore.
While the Power-7 chips are set to perform at 256 gigaflops per eight cores and eat up about 200 watts, the Blue Gene/Q SoC chips will provide 204 per processor with 18 cores and consume 55 watts at peak, thus delivering 15 times as many peak FLOPS than Blue Gene/P and 36 times as many as the original Blue Gene/L Soc.
What's special under the hood of the Blue Gene/Q is that it's the first commercially available chip to use transactional memory - a method of organizing related tasks into a single large job for more efficient processing. IBM will implement a transactional memory architecture on each chip using a tagging scheme on its level-two cache memory.
What's special under the hood of the Blue Gene/Q is that it's the first commercially available blade to use transactional memory - a method of organizing related tasks into a single large job for more efficient processing.
Philip Heidelberger, IBM Research staff member, described the interconnection network and message unit on Blue Gene/Q last week at the 19th annual Hot Interconnects Symposium on High Performance Interconnects. As explained in his abstract, “the network and the highly parallel message unit, which provides the functionality of a network interface card, are integrated onto the same chip as the processors and cache memory and occupy only 8 percent of the chip’s area, including IO cells.”
IBM Blue Gene/G: